Published in CPCI-S or CPCI-SSH indexed conference proceedings

International

• R.Sever and M.Aşkar.
  (2012) A 5GHz 8x8-bit multiplier using Wave Component Sampling Method.
  2012 International Conference On Advanced Electrical Engineering (ICAEE 2012)
  0-0, ISBN:

• R.Sever and M.Aşkar.
  (2010) 8×8-Bit Multiplier Designed with a New Wave-pipelining Scheme.
  2010 IEEE International Symposium On Circuits And Systems (ISCAS) / Proceedings Of 2010 IEEE International Symposium On Circuits And Systems (ISCAS)
  2095-2098, ISBN: 978-1-4244-5308-5

• N.Ismailoğlu and M.Aşkar.
  (2008) Verification Of Delay Insensitivity In Bit-Level Pipelined Dual-Rail Threshold Logic Adders.
  7th WSEAS International Conference On Electronics , Hardware, Wireless And Optical Communications / Electronics And Communications: Proceedings Of The 7th WSEAS International Conference On Electronics
  23-27, ISBN:

• N.Ismailoğlu and M.Aşkar.
  (2008) SDIVA: Structural Delay Insensitivity Verification Analysis Method for Bit-Level Pipelined Systolic Arrays with Early Output Evaluation.
  11th EUROMICRO Conference On Digital System Design / Proceedings Of 11th EUROMICRO Conference On Digital System Design - Architectures, Methods And Tools
  566-571, ISBN:

• N.Ismailoğlu and M.Aşkar.
  (2007) Application of Bit-Level Pipelining to Delay Insensitive Null Convention Adders.
  2007 IEEE International Symposium On Circuits And Systems / Proceedings Of 2007 IEEE International Symposium On Circuits And Systems, Vols 1-11
  3259-3262, ISBN:

• S.Yeşil , N.İsmailoğlu , C.Tekmen and M.Aşkar.
  (2004) Two Fast RSA Implementations Using High-Radix Montgomery Algorithm.
  2004 IEEE International Symposium On Circuits And Systems / Proceedings 2004 IEEE International Symposium On Circuits And Systems, Vol 2,
  557-560, ISBN:

• R.Sever , N.İsmailoğlu , C.Tekmen and M.Aşkar.
  (2004) A High Speed ASIC Implementation of the Rijndael Algorithm.
  IEEE International Symposium On Circuits And Systems / Proceedings Of 2004 IEEE International Symposium On Circuits And Systems, Vol 2,
  541-544, ISBN:

• A.Telli , M.Aşkar.
  (2004) CMOS LNA Design for System-on-Chip Receiver Stages.
  2004 Topical Meeting On Silicon Monolithic Integrated Circuits In RF Systems / Digest Of Papers Of 2004 Topical Meeting On Silicon Monolithic Integrated Circuits In RF Systems,
  171-174, ISBN:

• R.Sever , N.İsmailoğlu , C.Tekmen , M.Aşkar and B.Okcan.
  (2004) A High Speed FPGA Implementation of the Rijndael Algorithm.
  EUROMICRO Systems On Digital System Design / Proceedings Of The EUROMICRO Systems On Digital System Design
  541-544, ISBN:

• A.Telli , S.Demir , M.Aşkar.
  (2004) Practical Performance of Planar Spiral Inductors.
  IEEE / ICECS 2004: 11th IEEE International Conference On Electronics, Circuits And Systems
  487-490, ISBN:

• A.Telli , M.Askar.
  (2003) CMOS LNA Design for LEO Space S-Band Applications.
  15th IEEE Canadian Conference On Electrical And Computer Engineering / CCECE 2003: Canadian Conference On Electrical And Computer Engineering, Vols 1-3, Proceedings: Towar
  27-30, ISBN:

• E.Esen , A.Alatan , M.Aşkar.
  (2003) Trellis Coded Quantization for Data Hiding.
  IEEE Region 8 Eurocon 2003: International Conference On Computer As A Tool / IEEE Region 8 Eurocon 2003, Vol B, Proceedings: Computer As A Tool
  384-388, ISBN:

• A.Telli , S.Demir , M.Aşkar.
  (2003) Planar Spiral Inductor Modeling for RFIC Design.
  VLSI'03: International Conference On VLSI / VLSI'03: Proceedings Of The International Conference On VLSI
  138-142, ISBN:

• E.Ungan , M.Aşkar.
  (1994) A Gate Array Chip for High-Frequency DSP Applications.
  7th Mediterranean Electrotechnical Conference (MeleCON 94)
  549-552, ISBN:

• I.Torunoğlu , M.Aşkar.
  (1994) Fast Constraint Graph Generation Algorithms for VLSI Layout Compaction.
  7th Mediterranean Electrotechnical Conference (MeleCON 94)
  577-580, ISBN: